TechInsights predicts that DRAM will transition to sub-10nm technology nodes by the end of 2027.

TechInsights platform has recently released a video briefing on T1-2025 DRAM. The video briefing provides detailed information, roadmap updates, trends, comparisons, and outlooks on DRAM technology. D1a and D1b are mainstream products in the market. By the end of 2027, TechInsights expects DRAM to enter the sub-10nm technology node, such as D0a, followed by 0b and 0c generations. In the first quarter of 2025, a small portion of D1c products will be launched, first by SK Hynix. The D1c generation will dominate in 2026 and 2027, including HBM4 DRAM applications. From a market perspective, HBM products, especially HBM3 and HBM3E, have outstanding performance but are currently expensive, while traditional products such as LPDDR5 and DDR5 devices are lower-priced and relatively weaker in performance. Future AI and data centers will require higher memory capacity per die, such as 32Gb, 48Gb, or 64Gb chips, but the mainstream is still 16Gb die in the market. In higher-density DRAM chips, 3D DRAM architectures such as 4F2 vertical channel transistors (VCT) units, IGZO DRAM units, or 3D stacked DRAM units should be developed and commercialized at the sub-10nm node (sub-10nm node) level, especially by major vendors such as Samsung, SK Hynix, and Micron as candidate solutions for next-generation DRAM scaling.