Socionext Expands 3DIC Support with Advanced 3D Die Stacking and 5.5D Packaging Portfolio
ByAinvest
Wednesday, Aug 27, 2025 10:32 pm ET1min read
TSM--
Socionext's expertise in 2.5D designs and 3DICs unlocks several advantages. Heterogeneous integration allows different technology nodes (3nm, 5nm, 7nm) and functions (e.g., logic, memory, interface) to be integrated into a single package, addressing performance, density, and cost. Vertical stacking increases functionality in a smaller footprint, which is particularly valuable for space-constrained consumer devices. The F2F 3D stacking approach minimizes interconnect distance, significantly reducing signal latency and power consumption compared to traditional 2D and 2.5D designs.
The introduction of 3DIC, along with 5.5D support, reflects Socionext's strong focus on advancing heterogeneous integration. As demand grows for scalable, high-density, and energy-efficient platforms, especially in consumer, AI, and data center applications, 3DICs will play a pivotal role in shaping the future of semiconductor innovation.
Rajinder Cheema, CTO and Executive Vice President at Socionext, commented, "Socionext's extensive experience in SoC design and our collaboration with TSMC position us at the forefront of next-generation SoC development. This milestone reflects our dedication to delivering cutting-edge solutions that meet the evolving needs of our customers."
References:
[1] https://www.prnewswire.com/news-releases/socionext-expands-3dic-support-with-advanced-3d-die-stacking-and-5-5d-in-packaging-portfolio-302539935.html
Socionext has expanded its 3DIC support with advanced 3D die stacking and 5.5D in packaging portfolio, enabling compact, power-efficient consumer applications and high-performance AI and HPC devices. The company has successfully taped out a complete packaged device using TSMC's SoIC-X 3D stacking, combining an N3 compute die and an N5 I/O die in a face-to-face configuration. Socionext's expertise in 2.5D designs and 3DICs unlocks advantages such as heterogeneous integration, higher integration density, improved performance, and lower power consumption.
Socionext, a leading global System-on-Chip (SoC) supplier, has expanded its 3DIC support with advanced 3D die stacking and 5.5D in packaging portfolio. This move is aimed at enabling compact, power-efficient consumer applications and high-performance AI and HPC devices. The company successfully taped out a complete packaged device using TSMC's SoIC-X 3D stacking, combining an N3 compute die and an N5 I/O die in a face-to-face configuration.Socionext's expertise in 2.5D designs and 3DICs unlocks several advantages. Heterogeneous integration allows different technology nodes (3nm, 5nm, 7nm) and functions (e.g., logic, memory, interface) to be integrated into a single package, addressing performance, density, and cost. Vertical stacking increases functionality in a smaller footprint, which is particularly valuable for space-constrained consumer devices. The F2F 3D stacking approach minimizes interconnect distance, significantly reducing signal latency and power consumption compared to traditional 2D and 2.5D designs.
The introduction of 3DIC, along with 5.5D support, reflects Socionext's strong focus on advancing heterogeneous integration. As demand grows for scalable, high-density, and energy-efficient platforms, especially in consumer, AI, and data center applications, 3DICs will play a pivotal role in shaping the future of semiconductor innovation.
Rajinder Cheema, CTO and Executive Vice President at Socionext, commented, "Socionext's extensive experience in SoC design and our collaboration with TSMC position us at the forefront of next-generation SoC development. This milestone reflects our dedication to delivering cutting-edge solutions that meet the evolving needs of our customers."
References:
[1] https://www.prnewswire.com/news-releases/socionext-expands-3dic-support-with-advanced-3d-die-stacking-and-5-5d-in-packaging-portfolio-302539935.html

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