Marvell Unveils Industry's First 64 Gbps Bi-Directional Interface for 2nm XPUs, Boosting Performance and Efficiency
ByAinvest
Wednesday, Aug 27, 2025 4:38 pm ET1min read
MRVL--
The new interface, available in both 2nm and 3nm nodes, boasts a minimal depth configuration that requires only 15% of the compute die area compared to traditional implementations. This configuration significantly reduces silicon area requirements, making it a crucial advancement for next-generation data centers.
Key features of the Marvell 64 Gbps bi-directional D2D interface include advanced adaptive power management, which automatically adjusts device activity to bursty data center traffic, and redundant lanes with automatic lane repair, which enhance system reliability by eliminating weak links. These features collectively contribute to a more efficient and resilient system.
Marvell's commitment to innovation is evident in this latest announcement, which follows their 2nm platform announcement in March 2024 and the demonstration of working 2nm silicon by March 2025. The company continues to solidify its position as a leading innovator in semiconductor solutions, providing critical technology for the data infrastructure needs of the future.
References:
[1] https://www.marketscreener.com/news/marvell-technology-inc-unveils-industry-s-first-64-gbps-wire-bi-directional-die-to-die-interface-i-ce7c50d9df8af426
[2] https://www.gurufocus.com/news/3079653/marvell-unveils-industrys-first-64-gbpswire-bidirectional-dietodie-interface-ip-in-2nm-to-power-next-generation-xpus-mrvl-stock-news
Marvell Technology has unveiled the industry's first 2nm 64 Gbps bi-directional die-to-die interface, enabling 32 Gbps of simultaneous two-way connectivity per wire. This technology boasts a 3x higher bandwidth density than current solutions, with up to 75% power reduction during normal workloads. The interface is designed to enhance the performance capabilities of next-generation XPUs.
Marvell Technology, Inc. has made a significant breakthrough with the unveiling of the industry's first 2nm 64 Gbps bi-directional die-to-die (D2D) interface, designed to enhance the performance capabilities of next-generation XPUs. This innovative technology enables 32 Gbps of simultaneous two-way connectivity per wire, delivering a 3x higher bandwidth density than current solutions. The interface also promises substantial power efficiency gains, achieving up to 75% power reduction during normal workloads and up to 42% during peak traffic periods.The new interface, available in both 2nm and 3nm nodes, boasts a minimal depth configuration that requires only 15% of the compute die area compared to traditional implementations. This configuration significantly reduces silicon area requirements, making it a crucial advancement for next-generation data centers.
Key features of the Marvell 64 Gbps bi-directional D2D interface include advanced adaptive power management, which automatically adjusts device activity to bursty data center traffic, and redundant lanes with automatic lane repair, which enhance system reliability by eliminating weak links. These features collectively contribute to a more efficient and resilient system.
Marvell's commitment to innovation is evident in this latest announcement, which follows their 2nm platform announcement in March 2024 and the demonstration of working 2nm silicon by March 2025. The company continues to solidify its position as a leading innovator in semiconductor solutions, providing critical technology for the data infrastructure needs of the future.
References:
[1] https://www.marketscreener.com/news/marvell-technology-inc-unveils-industry-s-first-64-gbps-wire-bi-directional-die-to-die-interface-i-ce7c50d9df8af426
[2] https://www.gurufocus.com/news/3079653/marvell-unveils-industrys-first-64-gbpswire-bidirectional-dietodie-interface-ip-in-2nm-to-power-next-generation-xpus-mrvl-stock-news

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