Cadence and Rapidus: Revolutionizing AI and HPC with 2nm Semiconductors

The semiconductor industry is on the cusp of a significant breakthrough, as Cadence Design Systems and Rapidus Corporation join forces to develop leading-edge 2nm semiconductor solutions tailored for AI and high-performance computing (HPC) applications. This collaboration, announced at SEMICON Japan, is set to revolutionize the industry by leveraging advanced process technology and AI-driven reference design flows.

Cadence and Rapidus are working together to create co-optimized AI-driven reference design flows that support Rapidus' 2nm gate-all-around (GAA) process and backside power delivery network (BSPDN) technology. By combining Cadence's broad IP portfolio, including HBM4, 224G SerDes, and PCIe 7.0, with Rapidus' cutting-edge process technology, the partnership aims to facilitate the development of advanced, energy-efficient chips.

The 2nm GAA process, employed by Rapidus, significantly enhances power efficiency and performance in AI and HPC workloads. GAA technology wraps the gate around the channel, reducing leakage current and improving control over the channel's electrical properties. This leads to lower power consumption and higher switching speeds, enabling more efficient processing of complex AI and HPC tasks. Additionally, the BSPDN technology optimizes power delivery, further improving performance and reducing power consumption.

BSPDN technology offers several key benefits for designing and manufacturing advanced semiconductor solutions tailored for AI and HPC applications. Firstly, BSPDN enables more efficient power delivery to the transistors, reducing power consumption and heat generation. Secondly, BSPDN allows for a more compact design, as power delivery is optimized on the backside of the chip, freeing up space for more transistors and improving area efficiency. Lastly, BSPDN technology facilitates better thermal management, which is vital for high-performance computing, ensuring that the chip can operate at peak efficiency without overheating.

The collaboration between Cadence and Rapidus on 2nm semiconductor solutions for AI and HPC applications is poised to significantly enhance performance and efficiency. By integrating Cadence's broad IP portfolio with Rapidus' 2nm GAA and BSPDN technology, the partnership will facilitate the development of advanced, energy-efficient chips. This combination of cutting-edge process technology and comprehensive IP solutions will enable customers to meet increasingly stringent power, performance, and area requirements, driving innovation in AI and HPC applications.



As the semiconductor industry continues to evolve, the collaboration between Cadence and Rapidus serves as a testament to the power of innovation and partnership. By combining their expertise, these industry leaders are setting new technology standards and creating transformative solutions for mutual customers and the industry. The future of AI and HPC applications looks brighter than ever, thanks to the groundbreaking work of Cadence and Rapidus in the realm of 2nm semiconductor solutions.