Alchip Validates 3DIC Ecosystem with Successful Test Chip Tape Out, Demonstrates Leadership in 3D Technology.

Alchip Technologies, a high-performance ASIC leader, has validated its 3DIC ecosystem readiness with a successful test chip tape out. The results demonstrate CPU/NPU core functionality, UCIe and PCIe PHY preparation, Lite-IO infrastructure, and third-party IP integration. The test chip integrates a 3nm top die and a 5nm base die using TSMC's SoIC-X packaging technology, and has been designed to stress test power density and thermal dissipation challenges inherent in 3D integration. The tape out validated several critical 3DIC capabilities, including cross-die synchronous die-to-die IP, design-for-test strategies, signal and power integrity analysis, thermal and mechanical simulations, and 3D physical design implementation and verification.