SEALSQ Advances Post-Quantum Security with Next-Gen TPMs Ahead of U.S. Deadline

SEALSQ Corp is accelerating post-quantum readiness with next-generation TPMs ahead of the 2027 U.S. Government deadline. The company's QVault TPM offers full PQC capability across all TPM functions, integrated directly into the chip's design, ensuring faster, more secure, and more efficient cryptographic operations. SEALSQ is on track to deliver PQC-capable TPM samples and certified production parts, making it one of the earliest vendors to enable quantum-resistant Trusted Platform Modules aligned with the latest Trusted Computing Group standard.

SEALSQ Corp (NASDAQ: LAES), a leading innovator in Post-Quantum Technology hardware and software solutions, is making significant strides in advancing quantum-resistant cryptographic capabilities. The company's latest initiative focuses on delivering next-generation Trusted Platform Modules (TPMs) designed to withstand the looming threat of quantum computing.

The urgency is underscored by the U.S. Government's strict timelines for adopting quantum-resistant cryptography. Under the National Security Agency’s CNSA 2.0 policy, all new National Security Systems acquisitions must be compliant by January 1, 2027, with broader enforcement milestones extending into the next decade. Additionally, the Office of Management and Budget Memorandum M-23-02 requires federal agencies to identify quantum-vulnerable systems and prepare migration budgets, placing post-quantum cryptography (PQC) at the center of national cybersecurity policy [2].

SEALSQ is positioned as a pioneer in quantum-resistant hardware. The company is on track to deliver the first PQC-capable TPM samples featuring native hardware support for ML-DSA-87 and ML-KEM-1024. These samples are set to be certified production parts, making SEALSQ one of the earliest vendors to enable quantum-resistant Trusted Platform Modules aligned with the latest Trusted Computing Group (TCG) standard for TPM 2.0 V185, updated in July 2025 to include PQC algorithms [2].

What sets SEALSQ's QVault TPM apart is its full PQC capability across all TPM functions. Unlike some competitors that primarily support PQC for firmware updates via post-quantum signatures alongside classical algorithms like ECDSA, SEALSQ’s QVault TPM offers full PQC integration directly into the chip’s design. This ensures that quantum-resistant cryptographic functions (e.g., key generation, signing, and encryption) are performed directly by the TPM’s dedicated hardware, providing faster, more secure, and more efficient cryptographic operations compared to software-based implementations.

Trusted Platform Modules (TPMs) are already central to modern security architectures, supporting secure boot processes, hardware-based cryptographic key storage, and device authentication that underpin zero-trust deployments. They are widely used to safeguard encrypted disks, strengthen VPN and Wi-Fi authentication, and enable remote attestation in cloud and IoT ecosystems. With the advent of quantum-resistant TPMs, these use cases are extended into the future, protecting sensitive infrastructures and digital identities against tomorrow’s quantum-enabled threats.

SEALSQ's CEO, Carlos Moreira, emphasized the importance of this development: “The countdown to 2027 has already started. Our customers, governments, enterprises, and critical infrastructure operators require trusted hardware that not only meets today’s standards but is certified to withstand tomorrow’s threats. With QVault™ TPM, SEALSQ is proud to lead the way” [2].

As organizations worldwide confront the challenges of the quantum transition, SEALSQ’s innovation ensures that customers can begin migration now with confidence.

References:
[1] https://www.globenewswire.com/news-release/2025/08/28/3140798/0/en/SEALSQ-Enhances-INeS-PKI-Platform-with-Code-Signing-Capability-to-Secure-Firmware-Integrity-in-Alignment-with-RED-and-CRA-Regulations.html
[2] https://www.stocktitan.net/news/LAES/sealsq-accelerates-post-quantum-readiness-with-next-generation-tp-ms-d9i7bpx5h9al.html