🏢 Which companies have filed patents or announced plans to integrate post-quantum security features into their microcontrollers?

🎯 Key take-away A half-dozen established semiconductor vendors – plus a few IP specialists and pure-play startups – have already put post-quantum (PQC) hardware blocks on their micro-controller road-maps, and many have filed patents or publicly announced integration plans. 2026-27 is shaping up to be the first big production window for “quantum-safe” MCUs. 🚀 --- ## Who’s doing what (patents / official product statements) | # | Company / Ticker | Evidence of PQC-in-MCU effort | What’s inside | Product status | |---|---|---|---|---| | 1 | **SEALSQ** (LAES) | Expanded patent pool covering “secure microcontroller architectures & anti-tamper for PQC” • QS7001 MCU samples shipped Q2-25 | On-chip Kyber-ML-KEM & Dilithium ML-DSA accelerators; FIPS-140-3 target | Pilot production 2H-26 | | 2 | **Microchip** (MCHP) | MEC175xB embedded-controller press release cites “immutable post-quantum cryptography support” complying with NSA CNSA 2.0 | Hardware ML-DSA signatures, PQ-secure boot, SHA-3 | Sampling now; mass prod. Q1-26 | | 3 | **Infineon** (IFX) | Product page notes AURIX TC4xx & Traveo families “support ML-KEM (Kyber) and ML-DSA (Dilithium)” in hardware | Dedicated lattice & hash-based crypto cores | Eval boards in field; auto-grade qual 2026 | | 4 | **NXP** (NXPI) | Corporate PQC white-paper and S32 Automotive Platform collateral list Kyber/Dilithium accelerators in S32Z / S32E2 MCU lines | PQShield IP block integrated, crypto-agile firmware | Early silicon with lead OEMs; public launch CES-26 | | 5 | **STMicro-electronics** (STM) | Announced HW accelerators + X-CUBE-PQC library for STM32 & Stellar MCUs | SHA-3 engine today; optional Kyber/Dilithium co-processor on STM32H6 roadmap | Beta silicon since Jul-25 | | 6 | **Renesas** (6723.T) | RA8P1 MCU family uses new RSIP-E50D security block incl. SHA-3 & modern signature support; PQC upgrade path detailed in launch notes | Cryptographic engine ready for Kyber, Dilithium firmware drop | RTM 1H-26 | | 7 | **Rambus** (private IP) | “Quantum-Safe Engine QSE-IP-86” offers ML-KEM & ML-DSA; licensed to several MCU makers | Drop-in IP core, DPA-resistant variant | Shipping RTL today | | 8 | **PQSecure** (start-up) | Granted U.S. patent US 11,632,242 “Low-footprint hardware architecture for Kyber-KEM” | Ultra-compact lattice KEM engine for Arm-M-class MCUs | IP available for licence | | 9 | **PQShield** (start-up) | Named “Hot-Tech Innovator” for PQC IP; already supplying MCU vendors (NXP, Infineon, Renesas) | Full Kyber/Dilithium/SPHINCS+ IP suite, FIPS-140-3 certified software | Multiple customer tape-outs | --- ### Why patents & early announcements matter 🧐 1. **Design-in cycles are long** – Automakers and industrial OEMs lock silicon 3-4 years before production. Vendors that patent early win sockets early. 2. **Regulatory pull is approaching** – U.S. federal procurement rules and EU cyber-resilience acts reference NIST-PQC drafts; compliance will require hardware roots-of-trust. 3. **Performance & power** – Benchmarks show lattice accelerators cut PQC handshake latency 7-20× and energy 80 % vs. pure-software, critical for battery IoT. --- ## Investor & strategic implications 💡 • **Pure exposure:** SEALSQ offers the most undiluted bet on quantum-safe chips, but carries execution risk typical of small fabs. • **Scale & margin:** Infineon, NXP, Microchip and ST can spread R&D over huge MCU volumes, making PQC a defensible differentiator rather than a cost burden. • **“Arms-dealer” play:** Rambus, PQShield and PQSecure monetize via IP royalties that grow with every additional foundry tape-out. --- ### What to watch next 📆 1. Final FIPS 203/204 standards (expected late-2025) – will lock register-level specs for Kyber & Dilithium engines. 2. First automotive PPAP approvals of PQC-enabled MCUs (likely 2026) – a major volume catalyst. 3. M&A activity – IP houses with validated silicon will become attractive targets for the big MCU vendors. Stay tuned – the shift from “crypto-agile” firmware to **silicon-hard** post-quantum security is no longer theoretical; it’s arriving on eval boards today! 🔐✨